Scientists prepare a 2-inch molybdenum disulfide single crystal thin film, promo

At present, in order to address the bottleneck of chip miniaturization and to further advance the scaling down of transistors, it is essential to seek entirely new channel materials, thereby developing new device functions and device architectures.

In 2017, as the next generation of transistor channel materials, two-dimensional semiconductors were included in the International Roadmap for Devices and Systems (IRDS).

According to the latest technological roadmap forecasts: two-dimensional chip technology will officially achieve commercialization by 2034, thereby enhancing the performance of integrated circuits in the "post-Moore era."

As a two-dimensional semiconductor material, molybdenum disulfide, with its various advantages, has become an ideal material for solving the miniaturization bottleneck of silicon-based devices and for constructing the next generation of new chips with higher integration, faster speed, and lower power consumption.

To realize the full potential of two-dimensional semiconductors and their application in high-performance chips, it is very necessary to synthesize single-crystal wafers of two-dimensional semiconductors in a controllable manner on universal commercial substrates.In response to this, some leading international material growth research groups have taken this issue as an important topic to tackle, and have made a series of progress in the preparation of two-dimensional semiconductor single crystal wafers [1].

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However, the preparation of two-dimensional semiconductor single crystal wafers currently mainly relies on substrate step engineering strategies. This usually requires special design of the substrate, such as carefully designing the oblique cutting angle, or annealing treatment under harsh high-temperature environments.

At the same time, there is still a lot of controversy about the growth mechanism of two-dimensional semiconductor single crystal wafers.

Therefore, how to synthesize two-dimensional semiconductor single crystal wafers in a controllable manner on general commercial substrates is crucial for deepening the understanding of the growth mechanism and promoting practical applications.Domestic teams have been deeply engaged in the research of two-dimensional materials, achieving multiple research outcomes for several consecutive years.

 

In response to the aforementioned issues, researchers such as Dr. Guangyu Zhang and Dr. Luojun Du from the Institute of Physics, Chinese Academy of Sciences / National Research Center for Condensed Matter Physics, based on their previous achievements in the epitaxial growth of high-quality two-dimensional molybdenum disulfide wafers [2], have proposed a new strategy for controlling the interface buffer layer.

 

That is, by precisely controlling the ratio of precursors, they regulate the formation and growth dynamics of the low-symmetry interface buffer layer. They have successfully grown a 2-inch single-layer molybdenum disulfide single-crystal thin film on an industrially compatible c-plane sapphire substrate by epitaxy.

 

Regarding the physical mechanism of the single-layer molybdenum disulfide single-crystal thin film, they first explored from the perspective of material symmetry.

 

The results revealed that the reason for the emergence of two crystal domain orientations is due to the c-plane sapphire substrate used for the epitaxial growth of the single-layer molybdenum disulfide, which possesses nearly C6 rotational symmetry, leading to their energy being almost degenerate.Thus, the research team realized that the reason for being able to prepare single-layer molybdenum disulfide (MoS2) single crystal wafers might be due to their control of the precursor ratio, which led to the reconstruction of the sapphire substrate surface and even the formation of a low-symmetry interface buffer layer.

To confirm this hypothesis, they demonstrated the single directional arrangement of MoS2 crystal grains across the entire wafer substrate, seamless stitching between grains, and large-area uniformity through cross-scale characterization ranging from the atomic scale to the centimeter scale.

Compared with previously grown polycrystalline samples and even mechanically exfoliated single crystal samples, this single-layer of single-crystal molybdenum disulfide grown by epitaxy exhibits ultra-high quality.

It exhibits perfect phonon circular dichroism, ~70% excellent exciton valley polarization characteristics, ultra-low defect density, a room temperature mobility of up to ~140 cm2V−1s−1, and an on-off ratio approaching 10^9.

This new strategy of interface buffer layer can provide a new solution for the preparation of single-crystal wafers of two-dimensional semiconductors represented by molybdenum disulfide, and is expected to promote the industrial application of two-dimensional semiconductors in high-performance electronics and optoelectronics [3].In detail, it can promote the application of two-dimensional semiconductors in high-performance electronics and optoelectronics devices, and help to push products such as sub-1nm two-dimensional chips, thin-film transistors, flexible display devices, interconnected devices, and intelligent wearable devices beyond the silicon-based limit towards application.

Moreover, due to the weaker interlayer van der Waals forces, two-dimensional materials can also be stacked vertically like Lego bricks, forming artificial quantum materials with atomically flat interfaces—Moore superlattices.

Researchers have stated that Moore superlattices can provide unprecedented opportunities for band structure control, light-matter interaction, as well as new physical phenomena and device architectures.

For example, the flat bands formed in Moore superlattices can greatly enhance the electron correlation interaction, thereby producing many novel topological and correlated electronic states.

Du Luojun from the research team said: "We are one of the earliest teams in the world to carry out research on Moore superlattices, and we were also invited to write a review paper on Moore photonics and optoelectronics in Science [4]."In addition, although in the past few years, people have witnessed a rich variety of novel electronic and optoelectronic properties of moiré materials.

However, up to now, the realization of these moiré quantum states usually requires extremely low temperatures, which has posed great difficulties for academic exploration and industrial applications.

For twisted bilayer molybdenum disulfide (MoS2) superlattices, although the academic community has theoretically elucidated the topological flat bands caused by electronic correlations a few years ago.

However, due to the high defect density (~10^13 cm^-2) of the single-layer samples obtained by exfoliating bulk materials, the twisted bilayer MoS2 moiré quantum states have always been in the blank area of experimental exploration.

The research team has grown high-quality single-crystal single-layer MoS2 by epitaxy, and its defect density is more than one order of magnitude lower than that of mechanical exfoliation. By this means, they have constructed a double-layer MoS2 moiré superlattice device.In the Moire flat bands at 1/4, 2/4, and 3/4 fillings, the correlation-induced correlated insulating states can be observed. Through this, the team has unveiled a layer-hybridized SU(4) quantum simulator.

Unlike the SU(2) correlation physics that has been more extensively studied in two-dimensional semiconductor Moire heterojunction systems, the SU(4) quantum simulator is expected to realize a series of novel quantum states, including orbital-selective Moire insulating phases and chiral spin liquids.

More importantly, for the correlated insulating state at 1/4 filling of the Moire flat band, the research group has achieved the largest correlation gap to date (approximately 126 meV) and, for the first time, elucidated the Moire correlated state at room temperature.

Furthermore, they constructed a twist-angle four-layer molybdenum disulfide device that includes both AA stacking and AB stacking, achieving coupling between the correlated insulating state in the AB stacking and the sliding ferroelectric order in the AA stacking.

At the same time, they have also clarified the possibility of coupling between different topological and correlated electronic states in the Moire system, clarifying the potential for realizing new coupled Moire properties [5].The anticipated development is expected to promote the construction of quantum devices based on the correlated electronic states of two-dimensional moiré superlattices, as well as their applications in the next generation of nanoelectronics and optoelectronics.

The coupling of different moiré states revealed by the team is expected to lead to the discovery of new types of moiré topological states, such as non-Abelian topological order and fractional quantum spin Hall states.

This could trigger the next "gold rush" in condensed matter physics research, driving the development and application of fields such as moiré electronics, photonics, and optoelectronics.

Further construction of high-performance devices will be pursued.In terms of material preparation, although the research group has currently achieved the fabrication of 2-inch single-layer molybdenum disulfide (MoS2) single crystal wafers, to meet the size standards compatible with current silicon-based technology (12 inches) in order to better balance product yield and manufacturing costs, it is necessary to prepare larger-sized single-layer molybdenum disulfide single crystal wafers.

In terms of non-destructive transfer, the current single-layer molybdenum disulfide single crystal wafers are grown on sapphire substrates, which are not compatible with device processing technology, hence the need to transfer them to the target substrate.

At the same time, the current transfer methods usually introduce damage and contamination, and the size is too small to meet the needs of wafer-level circuit integration applications.

Therefore, they plan to explore non-destructive, clean transfer technologies based on wafer size, such as ultra-high vacuum transfer technology and direct hard transfer technology, among others.In the construction of high-performance devices, compared to the more mature silicon-based device technology, the development of high-performance two-dimensional semiconductor devices still faces a series of challenges, such as contact issues, ultra-short channel processing issues, gate dielectric deposition, and interface optimization with two-dimensional semiconductors.

Therefore, they intend to use carbon as the channel in high-performance nanoelectronic devices based on two-dimensional semiconductors, promoting their industrial application in fields such as electronics and optoelectronics.

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